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(parent: 1566357) | patch
iio: adc: ti-adc128s052: Fix alignment for DMA safety
authorJonathan Cameron <Jonathan.Cameron@huawei.com>
Sun, 8 May 2022 17:56:12 +0000 (18:56 +0100)
committerJonathan Cameron <Jonathan.Cameron@huawei.com>
Tue, 14 Jun 2022 10:53:14 +0000 (11:53 +0100)
commit7f947aa6773dfe9f322fc9d22bf3a43b692b7f94
tree38f052b9982b12027160a13f2268ca5f07952f0atree | snapshot
parent15663578df37b976372bea44fa1f4837e0d3fdf4commit | diff
iio: adc: ti-adc128s052: Fix alignment for DMA safety

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Fixes: d8a4686ea1d1 ("iio: adc: Add TI ADC128S052")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-33-jic23@kernel.org
drivers/iio/adc/ti-adc128s052.c diff | blob | history
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