]> git.baikalelectronics.ru Git - kernel.git/commit
drm/amdgpu: Ensure HDA function is suspended before ASIC reset
authorKai-Heng Feng <kai.heng.feng@canonical.com>
Thu, 7 Apr 2022 12:12:28 +0000 (20:12 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 7 Apr 2022 20:35:48 +0000 (16:35 -0400)
commit7f6a1c073c5084173b300bd8ab60e4168a51af74
treeaf554db84a476aadaeb947e003b2de3018c5b74a
parent7319ff4def34168afc1ff7b31cba0eb047d25000
drm/amdgpu: Ensure HDA function is suspended before ASIC reset

DP/HDMI audio on AMD PRO VII stops working after S3:
[  149.450391] amdgpu 0000:63:00.0: amdgpu: MODE1 reset
[  149.450395] amdgpu 0000:63:00.0: amdgpu: GPU mode1 reset
[  149.450494] amdgpu 0000:63:00.0: amdgpu: GPU psp mode1 reset
[  149.983693] snd_hda_intel 0000:63:00.1: refused to change power state from D0 to D3hot
[  150.003439] amdgpu 0000:63:00.0: refused to change power state from D0 to D3hot
...
[  155.432975] snd_hda_intel 0000:63:00.1: CORB reset timeout#2, CORBRP = 65535

The offending commit is b890ad00836d61 ("drm/amdgpu: always reset the asic in
suspend (v2)"). Commit ca2f97056e6c5 ("drm/amdgpu: don't use BACO for
reset in S3 ") doesn't help, so the issue is something different.

Assuming that to make HDA resume to D0 fully realized, it needs to be
successfully put to D3 first. And this guesswork proves working, by
moving amdgpu_asic_reset() to noirq callback, so it's called after HDA
function is in D3.

Fixes: b890ad00836d61 ("drm/amdgpu: always reset the asic in suspend (v2)")
Signed-off-by: Kai-Heng Feng <kai.heng.feng@canonical.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c