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drm/i915: Pimp icl+ sagv pre/post update
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Fri, 18 Feb 2022 06:40:37 +0000 (08:40 +0200)
committerVille Syrjälä <ville.syrjala@linux.intel.com>
Fri, 18 Feb 2022 19:36:26 +0000 (21:36 +0200)
commit7aa19732403d9cf45bbae8e9c33ba73abd7ec33f
treeae54a9c27c968962c356d7a32ea080d4b194a53ctree | snapshot
parent2dbda9253c6bd7be13365d24035325ee7cfe8e46commit | diff
drm/i915: Pimp icl+ sagv pre/post update

Add some debugs on what exactly we're doing to the QGV point mask
in the icl+ sagv pre/post plane update hooks. Currently we're just
guessing.

v2: s/u32/u16/ for consistency with the mask sizes (Stan)

Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220218064039.12834-5-ville.syrjala@linux.intel.com
drivers/gpu/drm/i915/intel_pm.c diff | blob | history
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