The "tsb csync" instruction is part of the Armv8.4 architecture
extension, and is not supported by many older assemblers.
We already cater for this in lib/extensions/trbe/trbe.c, where we use
the equivalent "hint #18" encoding for this, but use the new mnemonic
in the Cortex-A510 CPU support code.
Replace "tsb csync" with the hint encoding there as well, to support
building with older binutils versions.
Change-Id: Idf39f5c6c4dbf72802c3c120047b8bc499145e3b Signed-off-by: Andre Przywara <andre.przywara@arm.com>