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(parent: 66d4cfc) | patch
arm: socfpga: soc64: Add SDM triggered warm reset bit mask
authorChee Hong Ang <chee.hong.ang@intel.com>
Wed, 5 Aug 2020 13:15:56 +0000 (21:15 +0800)
committerLey Foon Tan <ley.foon.tan@intel.com>
Fri, 9 Oct 2020 09:53:11 +0000 (17:53 +0800)
commit7957008abb9174e93a9f26a3c254116e3da5968b
tree01943c384986475e7094c52f6faa50494990e0catree | snapshot
parent66d4cfcaa2ea8d88acbdf6fa61d4d4217283cb19commit | diff
arm: socfpga: soc64: Add SDM triggered warm reset bit mask

Include SDM triggered warm reset bit (BIT1) in Reset Manager's stat
register when checking for HPS warm reset status.
Refactor the warm reset mask macro for clarity purpose.

Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
arch/arm/mach-socfpga/include/mach/reset_manager_soc64.h diff | blob | history
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