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(parent: 63c7e60) | patch
drm/amd/display: update dispclk and dppclk vco frequency
authorEric Yang <Eric.Yang2@amd.com>
Fri, 15 Nov 2019 17:04:25 +0000 (12:04 -0500)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 5 Dec 2019 23:23:04 +0000 (18:23 -0500)
commit790adfc3be177cb80306d5dccce6204fc6ec86b3
tree45979ce66d0ea9908ce127875dd62ff3e61d781btree | snapshot
parent63c7e60824e69d3f77da071bacaef1e523f2a439commit | diff
drm/amd/display: update dispclk and dppclk vco frequency

Value obtained from DV is not allowing 8k60 CTA mode with DSC to
pass, after checking real value being used in hw, find out that
correct value is 3600, which will allow that mode.

Signed-off-by: Eric Yang <Eric.Yang2@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c diff | blob | history
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