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MIPS: TXx9: Microoptimize interrupt handlers
authorAtsushi Nemoto <anemo@mba.ocn.ne.jp>
Mon, 1 Sep 2008 13:22:37 +0000 (22:22 +0900)
committerRalf Baechle <ralf@linux-mips.org>
Sat, 11 Oct 2008 15:18:47 +0000 (16:18 +0100)
commit77ec6095a8a222f5f3f5659e668afab329af3681
tree94895b0fdc98e5f6ac44ba667feb96a9433a7065tree | snapshot
parent80633811704f6ad225806a9004bc6ab237e6410ecommit | diff
MIPS: TXx9: Microoptimize interrupt handlers

The IOC interrupt status register on RBTX49XX only have 8 bits.  Use
8-bit version of __fls() to optimize interrupt handlers.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/txx9/rbtx4927/irq.c diff | blob | history
arch/mips/txx9/rbtx4938/irq.c diff | blob | history
include/asm-mips/txx9/generic.h diff | blob | history
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