]> git.baikalelectronics.ru Git - kernel.git/commit
drm/i915/xehp: VDBOX/VEBOX fusing registers are enable-based
authorTvrtko Ursulin <tvrtko.ursulin@intel.com>
Wed, 21 Jul 2021 22:30:30 +0000 (15:30 -0700)
committerMatt Roper <matthew.d.roper@intel.com>
Fri, 23 Jul 2021 02:15:06 +0000 (19:15 -0700)
commit7595b4c6a788f92d0deb8c8365070e76b5f9ee7f
tree9c80265f212d7fb80dfd5eb062d2954ebea1d594
parent2eb12fe44228a9aecc21246c16d55c40bc182e63
drm/i915/xehp: VDBOX/VEBOX fusing registers are enable-based

On Xe_HP the fusing register is renamed and changed to have the "enable"
semantics, but otherwise remains compatible (mmio address, bitmask
ranges) with older platforms.

To simplify things we do not add a new register definition but just stop
inverting the fusing masks before processing them.

Bspec: 52615
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Matt Atwood <matthew.s.atwood@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210721223043.834562-6-matthew.d.roper@intel.com
drivers/gpu/drm/i915/gt/intel_engine_cs.c