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(parent: 81e480d) | patch
RISC-V: Add DT documentation for SiFive L2 Cache Controller
authorYash Shah <yash.shah@sifive.com>
Mon, 6 May 2019 10:48:39 +0000 (16:18 +0530)
committerPalmer Dabbelt <palmer@sifive.com>
Fri, 17 May 2019 03:42:13 +0000 (20:42 -0700)
commit74ab2d005fb1c389b8df6cf14c6a1165e730caee
treef0578abef4b66e0aaf6ffcf087df6a2a3643183btree | snapshot
parent81e480d6c54429ed0a2ab7117398178256361b99commit | diff
RISC-V: Add DT documentation for SiFive L2 Cache Controller

Add device tree bindings for SiFive FU540 L2 cache controller driver

Signed-off-by: Yash Shah <yash.shah@sifive.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
Documentation/devicetree/bindings/riscv/sifive-l2-cache.txt [new file with mode: 0644] blob
Linux Kernel Source Tree.