]> git.baikalelectronics.ru Git - kernel.git/commit
spi: bcm63xx-hsspi: Fix multi-bit mode setting
authorWilliam Zhang <william.zhang@broadcom.com>
Thu, 9 Feb 2023 20:02:41 +0000 (12:02 -0800)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Sat, 11 Mar 2023 15:43:47 +0000 (16:43 +0100)
commit74a6fb37e7bc97834ce92cc4e51919672b7135a9
tree4bf24448a8a62be1158949cadad4d15d0831ca27
parent032ed77d6386a9434372aa2eaf1a76c14ae2cc9b
spi: bcm63xx-hsspi: Fix multi-bit mode setting

[ Upstream commit 811ff802aaf878ebbbaeac0307a0164fa21e7d40 ]

Currently the driver always sets the controller to dual data bit mode
for both tx and rx data in the profile mode control register even for
single data bit transfer. Luckily the opcode is set correctly according
to SPI transfer data bit width so it does not actually cause issues.

This change fixes the problem by setting tx and rx data bit mode field
correctly according to the actual SPI transfer tx and rx data bit width.

Fixes: 87fb209311aa ("spi: bcm63xx-hsspi: add bcm63xx HSSPI driver")
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Link: https://lore.kernel.org/r/20230209200246.141520-11-william.zhang@broadcom.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
drivers/spi/spi-bcm63xx-hsspi.c