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(parent: ae30e95) | patch
MIPS: mm: page: Add MIPS R6 support
authorMarkos Chandras <markos.chandras@imgtec.com>
Wed, 19 Nov 2014 09:39:56 +0000 (09:39 +0000)
committerMarkos Chandras <markos.chandras@imgtec.com>
Tue, 17 Feb 2015 15:37:30 +0000 (15:37 +0000)
commit742ce4934634111ad15eee8939160ad99fb9e0a6
tree15eed1fdc2a4845ec601dec5b162b3a77778e12atree | snapshot
parentae30e95db69dd458013d09ace56cb194a4c47487commit | diff
MIPS: mm: page: Add MIPS R6 support

The MIPS R6 pref instruction only has 9 bits for the immediate
field so skip the micro-assembler PREF instruction if the offset
does not fit in 9 bits. Moreover, bit 30 (Pref_PrepareForStore) is
no longer valid in MIPS R6, so we change the default for all MIPS R6
processors to bit 5 (Pref_StoreStreamed).

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
arch/mips/mm/page.c diff | blob | history
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