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drm/i915/tgl: Update DPLL clock reference register
authorJosé Roberto de Souza <jose.souza@intel.com>
Thu, 11 Jul 2019 17:31:15 +0000 (10:31 -0700)
committerLucas De Marchi <lucas.demarchi@intel.com>
Thu, 11 Jul 2019 23:31:27 +0000 (16:31 -0700)
commit728087e7f3d76ff5b5a60e3a68280b58cf336407
tree0519e059df7260bb9ddab4ef3b72beb87577c578tree | snapshot
parent099d7162eb0e663b396e415cc5923e02f698970acommit | diff
drm/i915/tgl: Update DPLL clock reference register

This register definition changed from ICL and has now another meaning.
Use the right bits on TGL.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190711173115.28296-22-lucas.demarchi@intel.com
drivers/gpu/drm/i915/display/intel_dpll_mgr.c diff | blob | history
drivers/gpu/drm/i915/i915_reg.h diff | blob | history
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