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(parent: c2653f3) | patch
drm/i915: Allow p1 divider 2 on VLV
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Tue, 24 Sep 2013 18:26:26 +0000 (21:26 +0300)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Thu, 10 Oct 2013 10:46:53 +0000 (12:46 +0200)
commit724a7482883aa1eff3d963c3c9c67cd4049ec642
tree10aacabdd20743e624a0662d457ca59f597ae2f6tree | snapshot
parentc2653f3d6ac6f388a0face3f817760b817c8ada2commit | diff
drm/i915: Allow p1 divider 2 on VLV

According to VLV2_DPLL_mphy_hsdpll_frequency_table_ww6_rev1p1.xlsm p1
can be 2-3 always.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/intel_display.c diff | blob | history
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