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MIPS: Netlogic: Split XLP L1 i-cache among threads
authorJayachandran C <jchandra@broadcom.com>
Mon, 14 Jan 2013 15:11:56 +0000 (15:11 +0000)
committerJohn Crispin <blogic@openwrt.org>
Sat, 16 Feb 2013 23:15:20 +0000 (00:15 +0100)
commit6f7e05f67d4bbf558f30526f9b3ea09b4a32a9a4
tree3a075124416c51c5548e93fa6e2803e22682d021tree | snapshot
parentc6086e05a6cd30204b3ea3ba58aaddb1f79c9430commit | diff
MIPS: Netlogic: Split XLP L1 i-cache among threads

Since we now use r4k cache code for Netlogic XLP, it is
better to split L1 icache among the active threads, so that
threads won't step on each other while flushing icache.

The L1 dcache is already split among the threads in the core.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Patchwork: http://patchwork.linux-mips.org/patch/4787/
Signed-off-by: John Crispin <blogic@openwrt.org>
arch/mips/include/asm/netlogic/xlp-hal/cpucontrol.h diff | blob | history
arch/mips/netlogic/common/smpboot.S diff | blob | history
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