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(parent: 7dbdb06) | patch
MIPS: mark GIC clockevent device with CLOCK_EVT_FEAT_C3STOP
authorPaul Burton <paul.burton@imgtec.com>
Fri, 14 Feb 2014 09:21:30 +0000 (09:21 +0000)
committerPaul Burton <paul.burton@imgtec.com>
Fri, 2 May 2014 15:39:10 +0000 (16:39 +0100)
commit6f353032d4ae7a9cd423b7bc5ec88e365f35c342
treed9546ca9126c6bf78895843bbaf787a576d3c3e8tree | snapshot
parent7dbdb063fa163f129c8ad6e7d4afcf108f6ddcf1commit | diff
MIPS: mark GIC clockevent device with CLOCK_EVT_FEAT_C3STOP

Although the GIC counter will continue when a core is in a low power
state and it will still trigger interrupts, the core will be incapable
of servicing those interrupts rendering them useless.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
arch/mips/kernel/cevt-gic.c diff | blob | history
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