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(parent: c4c8740) | patch
xtensa: fix RASID SR initialization
authorMax Filippov <jcmvbkbc@gmail.com>
Mon, 10 Dec 2012 21:26:24 +0000 (01:26 +0400)
committerChris Zankel <chris@zankel.net>
Wed, 19 Dec 2012 05:10:25 +0000 (21:10 -0800)
commit6d6e3fef30d54064843452ec1f6601eaa752d86a
tree9f33109223bc7c04abdc8b2dabd19c259d60147etree | snapshot
parentc4c87400a87c2ca8cd84d0351775cb90ef6abd61commit | diff
xtensa: fix RASID SR initialization

set_rasid_register accepts new RASID SR value, but ASID_USER_FIRST is
ASID value for the ring 1; RASID value is made by ASID_INSERT macro.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
arch/xtensa/mm/mmu.c diff | blob | history
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