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drm/i915: Add workaround numbers to GEN7_COMMON_SLICE_CHICKEN1 whitelisting
authorJosé Roberto de Souza <jose.souza@intel.com>
Fri, 19 Nov 2021 14:09:31 +0000 (06:09 -0800)
committerJosé Roberto de Souza <jose.souza@intel.com>
Wed, 1 Dec 2021 19:08:12 +0000 (11:08 -0800)
commit6c77be23c5dfc91e4bd21d28822e61a77cba19ae
tree6b5d8db8d6385910b75d7e664cda0d9d235caee7tree | snapshot
parentbac0e9c6dc536a7fb2642f0413803597c83141ebcommit | diff
drm/i915: Add workaround numbers to GEN7_COMMON_SLICE_CHICKEN1 whitelisting

Those two workarounds needs to be implemented in UMD, KMD only needs
to whitelist the registers, so here only adding the workaround number
to facilitate future workaroud table checks.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Matt Atwood <matthew.s.atwood@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211119140931.32791-2-jose.souza@intel.com
drivers/gpu/drm/i915/gt/intel_workarounds.c diff | blob | history
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