]> git.baikalelectronics.ru Git - kernel.git/commit
drm/amd/display: Separate pipe disconnect from rest of progrmaming
authorAlvin Lee <alvin.lee2@amd.com>
Wed, 22 Jul 2020 04:32:14 +0000 (00:32 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 4 Aug 2020 21:29:28 +0000 (17:29 -0400)
commit6c2dbad3d6be68423547eefa6133957338466b3c
treeee3147d075d0ffb0d876d797efa70f4ac6ae7dcf
parente2809de0444ad06d996a90306ff6159681e30656
drm/amd/display: Separate pipe disconnect from rest of progrmaming

[Why]
When changing pixel formats for HDR (e.g. ARGB -> FP16)
there are configurations that change from 2 pipes to 1 pipe.
In these cases, it seems that disconnecting MPCC and doing
a surface update at the same time(after unlocking) causes
some registers to be updated slightly faster than others
after unlocking (e.g. if the pixel format is updated to FP16
before the new surface address is programmed, we get
corruption on the screen because the pixel formats aren't
matching). We separate disconnecting MPCC from the rest
of  the  pipe programming sequence to prevent this.

[How]
Move MPCC disconnect into separate operation than the
rest of the pipe programming.

Signed-off-by: Alvin Lee <alvin.lee2@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/core/dc.c
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.h
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_init.c
drivers/gpu/drm/amd/display/dc/dcn21/dcn21_init.c
drivers/gpu/drm/amd/display/dc/dcn30/dcn30_init.c
drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h