staging: mt7621-dts: correct various clock frequencies.

staging: mt7621-dts: correct various clock frequencies.

The MT7621 documentation says that the sys clock - also known
as OCP clock for the Open Core Protocol - can be configured to
1/3 or 1/4 of the CPU clock.
Testing on my hardware, using the fact that the SPI clock is
based on the OCP clock and measuring transfer rates, shows
a clock of a little over 200MHz with a CPU clock of 900MHz.
So assume 1/4 is the default.

Also, the nor-flash in the gbpc1 is documented as accepting 50MHz
for request requests, and higher for other requests.  So set
maximum to 50MHz.

Signed-off-by: NeilBrown <neil@brown.name>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>