]> git.baikalelectronics.ru Git - kernel.git/commit
ath10k: bypass PLL setting on target init for QCA9888
authorRajkumar Manoharan <rmanohar@qti.qualcomm.com>
Fri, 29 May 2015 14:51:53 +0000 (17:51 +0300)
committerKalle Valo <kvalo@qca.qualcomm.com>
Mon, 1 Jun 2015 07:00:41 +0000 (10:00 +0300)
commit6b50c3960c2efbb94eeaefee68b5af7506358a66
tree69dcdae63464cfafd8de22a3a93589d514235860
parent95d4e2eb9ccea1abc9c0d33db6db4696f1a299ac
ath10k: bypass PLL setting on target init for QCA9888

Some of of qca988x solutions are having global reset issue
during target initialization. Bypassing PLL setting before
downloading firmware and letting the SoC run on REF_CLK is fixing
the problem. Corresponding firmware change is also needed to set
the clock source once the target is initialized. Since 10.2.4
firmware is having this ROM patch, applying skip_clock_init only
for 10.2.4 firmware versions.

Signed-off-by: Rajkumar Manoharan <rmanohar@qti.qualcomm.com>
Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
drivers/net/wireless/ath/ath10k/core.c
drivers/net/wireless/ath/ath10k/core.h