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(parent: f500e17) | patch
drm/msm/mdp5: Update headers (add CTL flush bits)
authorStephane Viau <sviau@codeaurora.org>
Tue, 24 Mar 2015 13:30:01 +0000 (09:30 -0400)
committerRob Clark <robdclark@gmail.com>
Wed, 1 Apr 2015 23:29:36 +0000 (19:29 -0400)
commit6b10186205276d128e5a6979214704d96b313f36
treed180f2ca49633855accf5470107a722fb6b5c792tree | snapshot
parentf500e17fb0e51a57167f74bcfaeb5b518f00725ccommit | diff
drm/msm/mdp5: Update headers (add CTL flush bits)

Some upcoming targets have more bits to set in CTL_FLUSH
registers.

Example: msm8x16 needs to set TIMING1 bit so that some of the
INTF1's interface registers get flushed.

Signed-off-by: Stephane Viau <sviau@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
drivers/gpu/drm/msm/mdp/mdp5/mdp5.xml.h diff | blob | history
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