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(parent: 5d3cb16) | patch
soc/tegra: fuse: Cache values of straps and Chip ID registers
authorDmitry Osipenko <digetx@gmail.com>
Wed, 18 Dec 2019 18:23:01 +0000 (21:23 +0300)
committerThierry Reding <treding@nvidia.com>
Fri, 10 Jan 2020 14:58:32 +0000 (15:58 +0100)
commit6997733754f17179464b4b0a7d9862b0422ef457
tree3f6ddbde5f01f868fe3b691f3167ba321191ec51tree | snapshot
parent5d3cb16057faefbb1681d0cb839ca235b0a44ac5commit | diff
soc/tegra: fuse: Cache values of straps and Chip ID registers

There is no need to re-read Chip ID and HW straps out from hardware each
time, it is a bit nicer to cache the values in memory.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
drivers/soc/tegra/fuse/tegra-apbmisc.c diff | blob | history
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