]> git.baikalelectronics.ru Git - arm-tf.git/commit
Tegra: rename secure scratch register macros
authorSteven Kao <skao@nvidia.com>
Mon, 23 Oct 2017 10:22:09 +0000 (18:22 +0800)
committerVarun Wadekar <vwadekar@nvidia.com>
Wed, 23 Jan 2019 18:32:48 +0000 (10:32 -0800)
commit601a8e549544ea85f478f43b68c4afdc3430a9e7
treecb9bee524c0267a086bb7c2ce4123ebf711b3ce8
parentd5bd0de6275e0a00f8b5c0c5076180ecc21f8da6
Tegra: rename secure scratch register macros

This patch renames all the secure scratch registers to reflect their
usage.

This is a list of all the macros being renamed:

- SECURE_SCRATCH_RSV1_* -> SCRATCH_RESET_VECTOR_*
- SECURE_SCRATCH_RSV6 -> SCRATCH_SECURE_BOOTP_FCFG
- SECURE_SCRATCH_RSV11_* -> SCRATCH_SMMU_TABLE_ADDR_*
- SECURE_SCRATCH_RSV53_* -> SCRATCH_BOOT_PARAMS_ADDR_*
- SECURE_SCRATCH_RSV55_* -> SCRATCH_TZDRAM_ADDR_*

NOTE: Future SoCs will have to define these macros to
      keep the drivers functioning.

Change-Id: Ib3ba40dd32e77b92b47825f19c420e6fdfa8b987
Signed-off-by: Steven Kao <skao@nvidia.com>
plat/nvidia/tegra/common/drivers/smmu/smmu.c
plat/nvidia/tegra/include/t186/tegra_def.h
plat/nvidia/tegra/soc/t186/plat_memctrl.c
plat/nvidia/tegra/soc/t186/plat_psci_handlers.c
plat/nvidia/tegra/soc/t186/plat_secondary.c
plat/nvidia/tegra/soc/t186/plat_setup.c