]> git.baikalelectronics.ru Git - kernel.git/commit
MIPS/tlbex: Fix LDDIR usage in setup_pw() for Loongson-3
authorHuacai Chen <chenhc@lemote.com>
Wed, 25 Mar 2020 03:44:54 +0000 (11:44 +0800)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Fri, 17 Apr 2020 08:50:12 +0000 (10:50 +0200)
commit5f3078a5e70086821b0c81695edf65d6ff6fb434
tree364fc1c2f412effcaae2524e8a0dc2bd480119d6
parent23459aedc4b2997f120a02cc6b307ffba0016699
MIPS/tlbex: Fix LDDIR usage in setup_pw() for Loongson-3

commit be3d02ddd68e8dd4c6d88ca44602637ccdcd940a upstream.

LDDIR/LDPTE is Loongson-3's acceleration for Page Table Walking. If BD
(Base Directory, the 4th page directory) is not enabled, then GDOffset
is biased by BadVAddr[63:62]. So, if GDOffset (aka. BadVAddr[47:36] for
Loongson-3) is big enough, "0b11(BadVAddr[63:62])|BadVAddr[47:36]|...."
can far beyond pg_swapper_dir. This means the pg_swapper_dir may NOT be
accessed by LDDIR correctly, so fix it by set PWDirExt in CP0_PWCtl.

Cc: <stable@vger.kernel.org>
Signed-off-by: Pei Huang <huangpei@loongson.cn>
Signed-off-by: Huacai Chen <chenhc@lemote.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
arch/mips/mm/tlbex.c