]> git.baikalelectronics.ru Git - kernel.git/commit
drm/amdgpu: Ensure HDA function is suspended before ASIC reset
authorKai-Heng Feng <kai.heng.feng@canonical.com>
Thu, 7 Apr 2022 12:12:28 +0000 (20:12 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 14 Apr 2022 02:21:58 +0000 (22:21 -0400)
commit5c73ca54383531ba8520919f14b22e7cea7568c9
treebcbec20a3ccc8992c3066aae17379fab40d0beac
parent2ebc1109d3887a7b23bba966479f2d12e1592bcd
drm/amdgpu: Ensure HDA function is suspended before ASIC reset

DP/HDMI audio on AMD PRO VII stops working after S3:
[  149.450391] amdgpu 0000:63:00.0: amdgpu: MODE1 reset
[  149.450395] amdgpu 0000:63:00.0: amdgpu: GPU mode1 reset
[  149.450494] amdgpu 0000:63:00.0: amdgpu: GPU psp mode1 reset
[  149.983693] snd_hda_intel 0000:63:00.1: refused to change power state from D0 to D3hot
[  150.003439] amdgpu 0000:63:00.0: refused to change power state from D0 to D3hot
...
[  155.432975] snd_hda_intel 0000:63:00.1: CORB reset timeout#2, CORBRP = 65535

The offending commit is b890ad00836d61 ("drm/amdgpu: always reset the asic in
suspend (v2)"). Commit 34452ac3038a7 ("drm/amdgpu: don't use BACO for
reset in S3 ") doesn't help, so the issue is something different.

Assuming that to make HDA resume to D0 fully realized, it needs to be
successfully put to D3 first. And this guesswork proves working, by
moving amdgpu_asic_reset() to noirq callback, so it's called after HDA
function is in D3.

Fixes: b890ad00836d61 ("drm/amdgpu: always reset the asic in suspend (v2)")
Signed-off-by: Kai-Heng Feng <kai.heng.feng@canonical.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c