ARM: socfpga: Introduce u-boot-with-nand-spl.sfp target

ARM: socfpga: Introduce u-boot-with-nand-spl.sfp target

The NAND devices with 128 kiB erase blocks require extra 64 kiB padding
between each SPL image. Generate U-Boot image with such a padding using
this new target.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dalon Westergreen <dwesterg@gmail.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>