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(parent: 5babb42) | patch
clk: renesas: r9a07g044: Add RSPI clock and reset entries
authorLad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Wed, 17 Nov 2021 00:26:01 +0000 (00:26 +0000)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Fri, 19 Nov 2021 10:36:27 +0000 (11:36 +0100)
commit59059681b4db68f120f15497a5aad079e7d8c88f
tree9919aa95510fab952592a181f12ccb3a21dfddfdtree | snapshot
parent5babb42e1ea06ef76eda6c5dd3f2c44b6ffb2caacommit | diff
clk: renesas: r9a07g044: Add RSPI clock and reset entries

Add RSPI{0,1,2} clock and reset entries to CPG driver.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20211117002601.17971-1-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
drivers/clk/renesas/r9a07g044-cpg.c diff | blob | history
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