]> git.baikalelectronics.ru Git - kernel.git/commit
usb: dwc3: core: Do not perform GCTL_CORE_SOFTRESET during bootup
authorRohith Kollalsi <quic_rkollals@quicinc.com>
Thu, 14 Jul 2022 04:56:25 +0000 (10:26 +0530)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 17 Aug 2022 12:23:52 +0000 (14:23 +0200)
commit5792b0c5ebc06678eee45d3f9c9d0bfb1ba2b36d
treedbab373be9fba3106a50c8d4f0c53fcb8df2b637
parent7ab14ce3df6e51cd44276255ed43bfb8e124b069
usb: dwc3: core: Do not perform GCTL_CORE_SOFTRESET during bootup

[ Upstream commit ae8ba7d00f79d6bd6b17bdd5613fa4fa65d6fee7 ]

According to the programming guide, it is recommended to
perform a GCTL_CORE_SOFTRESET only when switching the mode
from device to host or host to device. However, it is found
that during bootup when __dwc3_set_mode() is called for the
first time, GCTL_CORESOFTRESET is done with suspendable bit(BIT 17)
of DWC3_GUSB3PIPECTL set. This some times leads to issues
like controller going into bad state and controller registers
reading value zero. Until GCTL_CORESOFTRESET is done and
run/stop bit is set core initialization is not complete.
Setting suspendable bit of DWC3_GUSB3PIPECTL and then
performing GCTL_CORESOFTRESET is therefore not recommended.
Avoid this by only performing the reset if current_dr_role is set,
that is, when doing subsequent role switching.

Fixes: 13b775db4177 ("usb: dwc3: core: Do core softreset when switch mode")
Signed-off-by: Rohith Kollalsi <quic_rkollals@quicinc.com>
Link: https://lore.kernel.org/r/20220714045625.20377-1-quic_rkollals@quicinc.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
drivers/usb/dwc3/core.c