staging: comedi: adl_pci9118: tidy up the interrupt control/status register

staging: comedi: adl_pci9118: tidy up the interrupt control/status register

The register at offset 0x38 is the "interrupt control" register when written
and the "interrupt status" register when read. Both registers use the same
bit defines.

For aesthetics, use a common define for this register.

Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Reviewed-by: Ian Abbott <abbotti@mev.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>