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(parent: d9a3420) | patch
mlxsw: reg: Extend PMLP tx/rx lane value size to 4 bits
authorJiri Pirko <jiri@mellanox.com>
Thu, 31 Oct 2019 09:42:06 +0000 (11:42 +0200)
committerDavid S. Miller <davem@davemloft.net>
Thu, 31 Oct 2019 17:54:46 +0000 (10:54 -0700)
commit51eedba56375748a5a52179d6e5578b07f6bbdf1
treee1396ffd124736e5be9d19fef1ed80435445c27etree | snapshot
parentd9a3420558d212f7ed711fad6f04be7d7e0852facommit | diff
mlxsw: reg: Extend PMLP tx/rx lane value size to 4 bits

The tx/rx lane fields got extended to 4 bits, update the reg field
description accordingly.

Signed-off-by: Jiri Pirko <jiri@mellanox.com>
Reviewed-by: Shalom Toledo <shalomt@mellanox.com>
Signed-off-by: Ido Schimmel <idosch@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/mellanox/mlxsw/reg.h diff | blob | history
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