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clk: tegra: Optimize PLLX restore on Tegra20/30
authorDmitry Osipenko <digetx@gmail.com>
Sun, 22 Sep 2019 21:52:03 +0000 (00:52 +0300)
committerThierry Reding <treding@nvidia.com>
Mon, 11 Nov 2019 13:53:04 +0000 (14:53 +0100)
commit50df5bf69fdd895c5e239f4cd38821d3d4174dca
treeb69e868297e439d579722006d95ecd315800f9b3tree | snapshot
parent3837ef6492ac7035c22af486f297c4c930fba8dbcommit | diff
clk: tegra: Optimize PLLX restore on Tegra20/30

There is no need to re-configure PLLX if its configuration in unchanged
on return from suspend / cpuidle, this saves 300us if PLLX is already
enabled (common case for cpuidle).

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
drivers/clk/tegra/clk-tegra20.c diff | blob | history
drivers/clk/tegra/clk-tegra30.c diff | blob | history
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