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(parent: 3e94e34) | patch
drm/i915: No LLC_MLC for HSW.
authorBen Widawsky <ben@bwidawsk.net>
Fri, 21 Sep 2012 23:54:14 +0000 (16:54 -0700)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Sun, 11 Nov 2012 22:51:09 +0000 (23:51 +0100)
commit4ed8931e8f2481c5dc5d9fafa1111f548cf6cfb4
tree90d4af6ea6cc4d1a6777c07f20b2a4e968bad633tree | snapshot
parent3e94e342ea12b573848c6000a7323acf521043e1commit | diff
drm/i915: No LLC_MLC for HSW.

The mid-level cache or as it's more commonly referred to now as L3, is
not setup this way on HSW.

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/i915_gem_gtt.c diff | blob | history
Linux Kernel Source Tree.