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(parent: a4d616e) | patch
drm/radeon: enable gfx cgcg on CIK APUs
authorAlex Deucher <alexander.deucher@amd.com>
Thu, 19 Dec 2013 14:15:24 +0000 (09:15 -0500)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 24 Dec 2013 22:57:34 +0000 (17:57 -0500)
commit4b8f29d47480e3fb42300d3084f14cfd880e5c8b
tree0f96d420e39a1807ef0c7b35f8b8f0ff973f468ctree | snapshot
parenta4d616e4e45ee0fa2e77cf3cfb8008acafe8cbd7commit | diff
drm/radeon: enable gfx cgcg on CIK APUs

Enable coarse grained clockgating.  This works properly now
that smc is initialized earlier than the rlc and cp.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/radeon/radeon_asic.c diff | blob | history
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