]> git.baikalelectronics.ru Git - kernel.git/commit
clk: renesas: r9a07g043: Add RSPI clock and reset entries
authorBiju Das <biju.das.jz@bp.renesas.com>
Sun, 1 May 2022 08:34:48 +0000 (09:34 +0100)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Thu, 5 May 2022 10:10:21 +0000 (12:10 +0200)
commit4a759ee5f537965107812d5b9678e5cccb8a0613
tree273ac1de876b92a54caf39cd8fe5327e13d7787f
parent1cf389ee8e2644ee01a18292cc9950a3ab354c2e
clk: renesas: r9a07g043: Add RSPI clock and reset entries

Add RSPI{0,1,2} clock and reset entries to CPG driver.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220501083450.26541-3-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
drivers/clk/renesas/r9a07g043-cpg.c