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(parent: cf66a9b) | patch
drm/exynos/hdmi: fix PHY configuration sequence
authorAndrzej Hajda <a.hajda@samsung.com>
Wed, 23 Mar 2016 13:15:12 +0000 (14:15 +0100)
committerInki Dae <daeinki@gmail.com>
Fri, 29 Apr 2016 16:03:54 +0000 (01:03 +0900)
commit49efef8fb2d4f628e69c1ec9db3f2c13744cc1f2
tree69e4da85beda6745dab2033fb23790e504a7edd6tree | snapshot
parentcf66a9bfa02657add325c166063c171edf6294eacommit | diff
drm/exynos/hdmi: fix PHY configuration sequence

Proper PHY configuration should be as follow:
1. set HDMI clock parents to OSCCLK.
2. reconfigure PHY.
3. set HDMI clock parents to PHY.
4. wait for PLL stabilization.

The patch fixes it and consolidates the code.

Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
drivers/gpu/drm/exynos/exynos_hdmi.c diff | blob | history
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