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net/mlx5: Added "per_lane_error_counters" cap bit to PCAM
authorShay Agroskin <shayag@mellanox.com>
Sun, 30 Sep 2018 06:58:08 +0000 (09:58 +0300)
committerSaeed Mahameed <saeedm@mellanox.com>
Thu, 18 Oct 2018 20:32:36 +0000 (13:32 -0700)
commit494103bfecb904391e77179f9a7dbcdb72f1b437
treeff53fc579a93060e56ac30500a964e5187431d2ftree | snapshot
parent0b813ce6ca27545106b25ad6ae4d512037bec795commit | diff
net/mlx5: Added "per_lane_error_counters" cap bit to PCAM

Added "Per lane raw errors" capability bit in
Ports Capabilities Mask (PCAM) enhanced features
layout.

This bit determines if the fields "phy_raw_errors_laneX"
in "Physical Layer statistical" counters group are supported.

Signed-off-by: Shay Agroskin <shayag@mellanox.com>
Reviewed-by: Eran Ben Elisha <eranbe@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
include/linux/mlx5/mlx5_ifc.h diff | blob | history
Linux Kernel Source Tree.