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(parent: 6a08fee) | patch
ravb: fix race updating TCCR
authorSergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Thu, 16 Jul 2015 21:28:38 +0000 (00:28 +0300)
committerDavid S. Miller <davem@davemloft.net>
Tue, 21 Jul 2015 03:42:02 +0000 (20:42 -0700)
commit470f84a26ee75238b243ae8a3bd50f24ae975306
treed0df3b2e38679b11a188903b809e360a0a05a6f6tree | snapshot
parent6a08fee83e53bc9821fbbde46b9b201dc2c0c9e6commit | diff
ravb: fix race updating TCCR

The TCCR.TSRQn bit may get clearead after TCCR gets read, so that TCCR write
would get skipped. We don't need to check this bit before setting.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/renesas/ravb_main.c diff | blob | history
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