]> git.baikalelectronics.ru Git - uboot.git/commit
clk: socfpga: Read the clock parent's register base in probe function
authorChee Hong Ang <chee.hong.ang@intel.com>
Mon, 9 Mar 2020 08:21:59 +0000 (01:21 -0700)
committerTom Rini <trini@konsulko.com>
Sun, 5 Apr 2020 23:07:13 +0000 (19:07 -0400)
commit45f901dabd194f11893a8f704777938ae0c33d89
tree45801d30c37c1645ddfb353709ca5ba1fa31ce4d
parent4cbc9f876f171a8e779ed8994f0afde040275e3e
clk: socfpga: Read the clock parent's register base in probe function

This commit (332eecf72d7be362373e4d6a2b37325a418620d5) calls child's
ofdata_to_platdata() method before the parent is probed in dm core.
This has caused the driver no longer able to get the correct parent
clock's register base in the ofdata_to_platdata() method because the
parent clocks will only be probed after the child's ofdata_to_platdata().
To resolve this, the clock parent's register base will only be retrieved
by the child in probe() method instead of ofdata_to_platdata().

Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
drivers/clk/altera/clk-arria10.c