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(parent: 8b5d068) | patch
MIPS: Remove execution hazard barriers for Octeon.
authorDavid Daney <ddaney@caviumnetworks.com>
Tue, 12 May 2009 19:41:54 +0000 (12:41 -0700)
committerRalf Baechle <ralf@linux-mips.org>
Wed, 17 Jun 2009 10:06:26 +0000 (11:06 +0100)
commit455e4c4136802589e5bdc93c56752881bf119132
tree65a22ff83fb466cc3b8b639c660e7e05e16bc193tree | snapshot
parent8b5d068584e7539664dccf9d97c109c6a3f6a7d9commit | diff
MIPS: Remove execution hazard barriers for Octeon.

The Octeon has no execution hazards, so we can remove them and save an
instruction per TLB handler invocation.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Reviewed by: David VomLehn <dvomlehn@cisco.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h diff | blob | history
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