]> git.baikalelectronics.ru Git - kernel.git/commit
net: altera: tse: convert to phylink
authorMaxime Chevallier <maxime.chevallier@bootlin.com>
Fri, 2 Sep 2022 08:32:04 +0000 (10:32 +0200)
committerDavid S. Miller <davem@davemloft.net>
Mon, 5 Sep 2022 09:16:53 +0000 (10:16 +0100)
commit44b2ee7a6e4b6c8761b8d79523471695cefffa94
treee0d940703332e6d75ec40061b1f858bc05275c6f
parentea69552a38e384d7683487b88faf55ae466be9ee
net: altera: tse: convert to phylink

Convert the Altera Triple Speed Ethernet Controller to phylink.
This controller supports MII, GMII and RGMII with its MAC, and
SGMII + 1000BaseX through a small embedded PCS.

The PCS itself has a register set very similar to what is found in a
typical 802.3 ethernet PHY, but this register set memory-mapped instead
of lying on an mdio bus.

Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/altera/Kconfig
drivers/net/ethernet/altera/altera_tse.h
drivers/net/ethernet/altera/altera_tse_ethtool.c
drivers/net/ethernet/altera/altera_tse_main.c