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mediatek: mt8192: Fix non-MISRA compliant code
authorYidi Lin <yidi.lin@mediatek.com>
Tue, 15 Dec 2020 07:45:23 +0000 (15:45 +0800)
committerYidi Lin <yidi.lin@mediatek.com>
Wed, 16 Dec 2020 09:22:02 +0000 (17:22 +0800)
commit44ad5d67cf6006fc53e0248d78a0419a41f0de8d
tree7995ff502a1c86b05726d28b89d2e48d4cda16fatree | snapshot
parent04589e2b1e5eca4efbf032907879221c34e35c84commit | diff
mediatek: mt8192: Fix non-MISRA compliant code

CID 364146: Control flow issues (DEADCODE)

Since the value of PSTATE_PWR_LVL_MASK and the value the of PLAT_MAX_PWR_LVL
are equal on mt8192, the following equation never hold.

if (aff_lvl > PLAT_MAX_PWR_LVL) {
return PSCI_E_INVALID_PARAMS;
}

Remove the deadcode to comply with MISRA standard.

Signed-off-by: Yidi Lin <yidi.lin@mediatek.com>
Change-Id: I71d0aa826eded8c3b5af961e733167ae40699398
plat/mediatek/mt8192/plat_pm.c diff | blob | history
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