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(parent: 5d5acf7) | patch
ASoC: tegra: fix I2S bit count mask
authorStephen Warren <swarren@nvidia.com>
Tue, 5 Mar 2013 00:10:20 +0000 (17:10 -0700)
committerMark Brown <broonie@opensource.wolfsonmicro.com>
Tue, 5 Mar 2013 02:42:11 +0000 (10:42 +0800)
commit41d6babef20c3b7dbee6458eebe54399832c5d9e
treeec65734228968d4948dd50b9551aaea799058558tree | snapshot
parent5d5acf7f3e8c669857f1288b923731e4b4ceb550commit | diff
ASoC: tegra: fix I2S bit count mask

This register field is 11 bits wide, not 15 bits wide. Given the way
this value is currently, used, this patch has no practical effect.
However, it's still best if the value is correct.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
sound/soc/tegra/tegra20_i2s.h diff | blob | history
sound/soc/tegra/tegra30_i2s.h diff | blob | history
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