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(parent: e84be34) | patch
drm/i915/gvt: Clear the shadow page table entry after post-sync
authorZhi Wang <zhi.a.wang@intel.com>
Thu, 28 Dec 2017 18:50:08 +0000 (02:50 +0800)
committerZhenyu Wang <zhenyuw@linux.intel.com>
Thu, 4 Jan 2018 06:23:28 +0000 (14:23 +0800)
commit41ce47ca5d8d94d5c2ca35bb13e0a25e9fde45c4
tree386ce4f5f14d94013416994fe660ef26d20abdb3tree | snapshot
parente84be34a9997c1e2ba6b38663006fcdf51a3cfdccommit | diff
drm/i915/gvt: Clear the shadow page table entry after post-sync

A shadow page table entry needs to be cleared after being set as
post-sync. This patch fixes the recent error reported in Win7-32 test.

Fixes: 82c55d3233a9 ("drm/i915/gvt: vGPU graphics memory virtualization")
Signed-off-by: Zhi Wang <zhi.a.wang@intel.com>
CC: Stable <stable@vger.kernel.org>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
drivers/gpu/drm/i915/gvt/gtt.c diff | blob | history
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