]> git.baikalelectronics.ru Git - kernel.git/commit
spi: rockchip: Preset cs-high and clk polarity in setup progress
authorJon Lin <jon.lin@rock-chips.com>
Wed, 16 Feb 2022 01:40:26 +0000 (09:40 +0800)
committerMark Brown <broonie@kernel.org>
Thu, 17 Feb 2022 17:15:08 +0000 (17:15 +0000)
commit40f5f2f98fff91c49a6acd3443bf75a5a841d73a
tree41f2f81a72d4757cdd6e339a93a06a9f9d759c9b
parent527c19671d0361fc7e838a8d829a9f4edaeb8bcb
spi: rockchip: Preset cs-high and clk polarity in setup progress

After power up, the cs and clock is in default status, and the cs-high
and clock polarity dts property configuration will take no effect until
the calling of rockchip_spi_config in the first transmission.
So preset them to make sure a correct voltage before the first
transmission coming.

Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Link: https://lore.kernel.org/r/20220216014028.8123-5-jon.lin@rock-chips.com
Signed-off-by: Mark Brown <broonie@kernel.org>
drivers/spi/spi-rockchip.c