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(parent: 837c318) | patch
ARM: OMAP4: Make L4SEC clock domain SWSUP only
authorTero Kristo <t-kristo@ti.com>
Wed, 29 Apr 2020 14:30:01 +0000 (17:30 +0300)
committerTony Lindgren <tony@atomide.com>
Tue, 5 May 2020 18:16:06 +0000 (11:16 -0700)
commit4092562bab9e69e5500e2f7f486713416b17d182
treeee4b76632fba4929e66eac9d22cbfdcdeba68d99tree | snapshot
parent837c3186aacafaf2e8c35d63505e95ecacd9b928commit | diff
ARM: OMAP4: Make L4SEC clock domain SWSUP only

Commit bc244cc2a9e1 ('ARM: OMAP: DRA7xx: Make L4SEC clock domain SWSUP
only') made DRA7 SoC L4SEC clock domain SWSUP only because of power
state transition issues detected with HWSUP mode. Based on
experimentation similar issue exists on OMAP4, so do the same change
for OMAP4 also.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
arch/arm/mach-omap2/clockdomains44xx_data.c diff | blob | history
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