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(parent: 1f5c809) | patch
dmaengine: omap-dma: use cached CCR value when enabling DMA
authorRussell King <rmk+kernel@arm.linux.org.uk>
Wed, 6 Nov 2013 17:18:42 +0000 (17:18 +0000)
committerRussell King <rmk+kernel@arm.linux.org.uk>
Thu, 3 Apr 2014 23:30:21 +0000 (00:30 +0100)
commit3f1b88555b95043c9ab955c8e519d52855d3f3cd
tree2ab0905104403822ec05c5f402e9e39cb720dd91tree | snapshot
parent1f5c8090c678fd87c56cd908c7fdc239d4429c50commit | diff
dmaengine: omap-dma: use cached CCR value when enabling DMA

We don't need to read-modify-write the CCR register; we already know
what value it should contain at this point.  Use the cached CCR value
when setting the enable bit.

Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
drivers/dma/omap-dma.c diff | blob | history
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