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(parent: 9404ad6) | patch
arm: socfpga: vining: Let DWMAC configure PHY reset GPIO
authorMarek Vasut <marex@denx.de>
Tue, 14 Sep 2021 03:25:36 +0000 (05:25 +0200)
committerRamon Fried <rfried.dev@gmail.com>
Tue, 28 Sep 2021 15:50:55 +0000 (18:50 +0300)
commit3d5f7eff720a32e8eee61bc4f22bb9542060a760
tree8463601429ff52810ffce7ade50423d27463cc3btree | snapshot
parent9404ad67150db197e4867568f4e45c81f9172ca4commit | diff
arm: socfpga: vining: Let DWMAC configure PHY reset GPIO

The DM DWMAC driver is perfectly capable of configuring the ethernet
PHY reset GPIO, let the driver do it instead of doing it in the board
file.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>
board/softing/vining_fpga/socfpga.c diff | blob | history
"Das U-Boot" Source Tree.