]> git.baikalelectronics.ru Git - kernel.git/commit
arm64: dts: uniphier: Change phy-mode to RGMII-ID to enable delay pins for RTL8211E
authorKunihiko Hayashi <hayashi.kunihiko@socionext.com>
Thu, 22 Apr 2021 17:31:49 +0000 (02:31 +0900)
committerDavid S. Miller <davem@davemloft.net>
Thu, 22 Apr 2021 22:08:35 +0000 (15:08 -0700)
commit3d5c69ad643522da38b8716cced9b4b3ed30b9c3
tree6c4daf67aff91d9a0177582a186c9dd6c3ae00c6
parent70b5ceb660c9e8e28458a6ba28d277052656d8ea
arm64: dts: uniphier: Change phy-mode to RGMII-ID to enable delay pins for RTL8211E

UniPhier LD20 and PXs3 boards have RTL8211E ethernet phy, and the phy have
the RX/TX delays of RGMII interface using pull-ups on the RXDLY and TXDLY
pins.

After the commit 53d824f5fd40 ("net: phy: realtek: fix rtl8211e rx/tx
delay config"), the delays are working correctly, however, "rgmii" means
no delay and the phy doesn't work. So need to set the phy-mode to
"rgmii-id" to show that RX/TX delays are enabled.

Fixes: f1281d55fb06 ("arm64: dts: uniphier: add AVE ethernet node")
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi