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(parent: f413400) | patch
soc/tegra: fuse: Add spare bit offset for Tegra124
authorThierry Reding <treding@nvidia.com>
Mon, 4 May 2015 14:44:29 +0000 (16:44 +0200)
committerThierry Reding <treding@nvidia.com>
Thu, 16 Jul 2015 08:38:31 +0000 (10:38 +0200)
commit3b10161c74cc0e37a5c4fa0f0581ca0a532d341a
treeb01c7e1679e07578760b810bb91bc03b4503f93atree | snapshot
parentf41340028290ec120e6e2904833fa0cd56d3519ccommit | diff
soc/tegra: fuse: Add spare bit offset for Tegra124

The offset of the first spare bit register on Tegra124 is 0x300, but
account for the fixed offset of 0x100 in the fuse accessor.

Signed-off-by: Thierry Reding <treding@nvidia.com>
drivers/soc/tegra/fuse/fuse-tegra30.c diff | blob | history
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