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(parent: 70cd1b8) | patch
drm/nv50: preserve an unknown SOR_MODECTRL value for DP encoders
authorBen Skeggs <bskeggs@redhat.com>
Mon, 29 Mar 2010 00:06:09 +0000 (10:06 +1000)
committerBen Skeggs <bskeggs@redhat.com>
Fri, 9 Apr 2010 00:15:38 +0000 (10:15 +1000)
commit3abc9fd56ab2d4f2378d9748f5048676eda47b59
tree38b0a878a6272ebb22bf43ec296195e267b3a540tree | snapshot
parent70cd1b8de6308133308975e0d1e092ece5f578edcommit | diff
drm/nv50: preserve an unknown SOR_MODECTRL value for DP encoders

This value interacts with some registers we don't currently know how to
program properly ourselves.  The default of 5 that we were using matches
what the VBIOS on early DP cards do, but later ones use 6, which would
cause nouveau to program an incorrect mode on these chips.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
drivers/gpu/drm/nouveau/nouveau_encoder.h diff | blob | history
drivers/gpu/drm/nouveau/nv50_sor.c diff | blob | history
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